embedded - Atmel 32 bit gcc (avr32-gcc) inline assembler documentations? -
i need implement small fragment of code in assembly 32 bit avr (memory test testing ram under running c program, no other way solve it), can't find documentation on avr-32 specifics of inline assembler, , trial , error neither led me success.
first thing: know docs describing avr-32 specifics of inline asm? (particularly input / output register specifications)
i managed point able write inline fragment automatic input / output register allocation, strange behavior prevents me complete it. take following fragment of code:
int ret; int ad0; int ad1; /* ... */ __asm__ volatile( "mov r2, %0 \n\t" "mov r3, %1 \n\t" "mov %2, 0 \n\t" : "=r"(ret) : "r"(ad0), "r"(ad1) : "r2", "r3" );
compiled optimizations off using avr32-gcc produces following assembly output (-s
):
#app # 95 "svramt.c" 1 mov r2, r8 mov r3, r8 mov r9, 0 # 0 "" 2 #no_app
notice how %0 , %1 mapped same register (r8). seems happen if output register present. check whether used inline assembly improperly here, tried x86 native gcc on host:
int ret; int ad0; int ad1; /* ... */ __asm__ volatile( "mov %0, %%eax \n\t" "mov %1, %%ebx \n\t" "mov 0, %2, \n\t" : "=r"(ret) : "r"(ad0), "r"(ad1) : "eax", "ebx" );
this fragment compiles to:
#app # 7 "asmtest.c" 1 mov %esi, %eax mov %edx, %ebx mov 0, %ecx, # 0 "" 2 #no_app
this expected happen avr-32 counterpart, inputs , outputs mapping different registers.
i have liked work around problem (if bug in avr32-gcc) specifying registers directly (trying "=r8" , such input / output specs), doesn't compile way.
if there no documentation, know register specs inline asm found in (a "normal" x86 or arm) gcc's source? worth try, gcc huge beast wade through without prior knowledge.
i don't believe have enough karma done asm module (with near 0 knowledge of avr-32 assembly), , @ least need documentation of calling convention anyway neither found far...
edit: further experimenting shown using =&r
output specifier seems solve register mapping problem. why so, clueless (two inputs mapped same register). @ least thing may tested since produces intended assembly fragment.
further research revealed this avr 8 bit document offers part of solution describing square brackets providing names operands names can used in assembly fragment. eliminates probable ambiguity between operand map %n
specification in fragment. (i couldn't see syntax described in other documents, works in avr32-gcc well, useful)
Comments
Post a Comment